AArch64 MP+dmb.sy+addr-[fr-rf]-addr-rfi
"DMB.SYdWW Rfe DpAddrdR FrLeave RfBack DpAddrdW Rfi Fre"
Cycle=Rfi Fre DMB.SYdWW Rfe DpAddrdR FrLeave RfBack DpAddrdW
Relax=
Safe=Rfi Rfe Fre DMB.SYdWW DpAddrdW DpAddrdR [FrLeave,RfBack]
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr Rf
Orig=DMB.SYdWW Rfe DpAddrdR FrLeave RfBack DpAddrdW Rfi Fre
{
0:X1=x; 0:X3=y;
1:X1=y; 1:X4=z; 1:X8=x;
2:X1=z;
}
P0 | P1 | P2 ;
MOV W0,#2 | LDR W0,[X1] | MOV W0,#1 ;
STR W0,[X1] | EOR W2,W0,W0 | STR W0,[X1] ;
DMB SY | LDR W3,[X4,W2,SXTW] | ;
MOV W2,#1 | LDR W5,[X4] | ;
STR W2,[X3] | EOR W6,W5,W5 | ;
| MOV W7,#1 | ;
| STR W7,[X8,W6,SXTW] | ;
| LDR W9,[X8] | ;
Observed
z=1; y=1; x=2; 1:X9=2; 1:X5=0; 1:X3=1; 1:X0=0;